In the layout of the IC layout, the Design Rules will often indicate that the metal line should be dug when the metal line is larger than a certain width. At the same time, the metal density will also be limited. If less than the specified percentage, add dummy metal. The two rules are aimed at the same purpose, that is, the uniformity of the metal on the entire chip.
Imagine the density of metal on the chip is not uniform enough, some places have high density, and some places have low density. After metal deposition, the metal density is low, and after etching and polishing, the original layout (Layout)
In areas where the metal density is low, the thickness of the metal corresponding to the wafer is now thinner than the area where the metal density is higher. Therefore, the flatness of the wafer is directly affected, which affects the accuracy of subsequent processes and causes
The poor electrical performance of the IC directly affects the yield of the wafer.
When the metal density of the entire chip layout is too low, the corresponding amount of metal to be etched out on the wafer is too much, which easily causes the etching to be unclean, and there is too much metal remaining on the wafer, which affects subsequent processes. When the metal density of the entire chip layout is too high, the corresponding amount of metal to be etched out on the wafer is small, which easily causes excessive etching, and the normal metal wire is also etched away.
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