China, Beijing - December 4, 2014 - Silicon Labs (NASDAQ: SLAB), a leader in providing high-performance clocking solutions for Internet infrastructure, today announced the release of PCI Express (PCIe) Gen1/2/ 3 Fanout Buffers, designed for data center applications including servers, storage and switches. For today's leading x86 motherboard and server systems, the new Si5310x/11x/019 PCIe Buffer is the industry's most energy-efficient fanout buffer, effectively expanding Silicon Labs' growing PCIe timing product line. With a flexible output count option, the new PCIe buffer is fully capable of meeting 98% of x86-based server/memory board design requirements.
For many years, data center equipment manufacturers have had to choose PCIe Gen3 buffers certified by major x86 CPUs and chipset vendors among a limited number of vendors. These traditional PCIe buffers are typically based on very power-hungry constant current output techniques, requiring at least four off-chip termination resistors and one reference resistor per output, adding bill of materials (BOM) cost. As energy and cooling costs become a key part of data center design, developers are increasingly looking for timing products that provide maximum energy efficiency while meeting stringent x86 motherboard specifications. Silicon Labs' Si5310x/11x/019 family of products provides device manufacturers with low-power, standards-compliant PCIe buffer products that are not only certified by major x86 CPU and chipset vendors, but also with powerful technology. stand by.
More than 90% of existing motherboard designs still use PCIe buffers based on constant current output technology. To meet the needs of these existing markets, Silicon Labs' new Si53019 PCIe constant current buffer provides a fully certified direct replacement compatible solution with 30% less energy consumption than traditional solutions.
To further reduce power consumption, Silicon Labs' Si5310x and Si5311x devices use the innovative push-pull output architecture to provide the industry's lowest power PCIe buffer family. These devices reduce power consumption by 60% compared to constant current buffers, while reducing the off-chip resistors required for each output, significantly reducing the number of off-chip devices and simplifying the design of printed circuit boards (PCBs). For example, by using Silicon Labs' 19-output Si53119 push-pull buffer instead of a traditional constant current device, developers can save nearly 1W of power and reduce 39 off-chip devices.
Silicon Labs' Si5310x and Si5311x push-pull output chips are also the best PCIe timing solutions for system designs in the new ARM® SoC-based ultra-large-scale server and storage market. Similar to x86-based designs, ARM-based SoC platforms for servers and storage devices use PCIe as the primary system data bus and interconnect. As system-level energy efficiency becomes the key to ultra-large-scale architectures, the new Si5310x and Si5311x devices with push-pull output are ideal for server and storage platform design (regardless of the CPU architecture).
In addition to considering energy consumption, manufacturers of data center equipment are also faced with the challenge of maintaining signal integrity, as clock signals are typically transmitted between boards up to 60 inches long. In such a long distance, the rise and fall times of the PCIe clock will be extended and slowed, which also leads to a decrease in jitter performance and an increase in system packet loss rate. Silicon Labs' PCIe Gen3 buffers are designed to provide long-distance clock signal transmission while maintaining compatibility with standard PCIe rise and fall time specifications to prevent jitter and packet loss.
Silicon Labs' new PCIe buffer family supports 6, 8, 12, 15, and 19 outputs, as well as constant current and push-pull output buffers, enabling developers to customize the best timing solution for each application. Compatible with traditional PCIe buffer pins and features, Silicon Labs' chips offer the best options for developers with enhanced energy efficiency, signal integrity and jitter performance.
James Wilson, director of clock product marketing at Silicon Labs, said: "Mobile Internet traffic and cloud computing are driving faster, higher performance data center equipment to choose high-precision timing solutions that support the PCIe standard and major x86 specifications. We have expanded PCIe timing The product line now includes a fully compliant x86-compliant PCIe Gen3 fanout buffer that dramatically reduces power, cost and complexity in data center equipment. Our new PCIe product complements Silicon Labs' arbitrary frequency clock generator. A single-chip clock tree solution is provided for server, switch and storage design."
Silicon Labs offers a broad portfolio of clocking products including frequency-flexible clock generators, jitter attenuators, clock buffers, PCIe clocks and oscillators for a wide range of IoT infrastructure applications. These high-performance timing solutions enable developers to provide a complete timing solution for data centers, core networks, wireless infrastructure, broadband access, and test and measurement designs through a single, one-stop vendor. .
Price and availability
The Si531xx and Si53019 PCIe fanout buffers are now in volume production and are available in samples. At 10,000-piece quantities, the Si531xx push-pull output buffer starts at $1.70, and the Si53019 constant-current output buffer starts at $2.85. To accelerate the development of server and storage applications with push-pull output clock buffers, Silicon Labs offers the Si53108-EK, Si53112-EK and Si53119-EK evaluation boards, each priced at $125 (seller's suggested retail price).
About Silicon Labs
Silicon Labs, Inc. (NASDAQ: SLAB) is a leading provider of silicon, software and system solutions for the Internet of Things, Internet infrastructure, industrial control, consumer electronics and automotive markets. We address the challenges of the electronics industry and bring significant benefits to customers in performance, energy efficiency, connectivity and minimalist design. Silicon Labs has a world-class engineering team with superior software and mixed-signal design experience, providing the tools and techniques designers need to quickly and easily turn their original ideas into the final product.
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