1, chip introduction
The FM1004 uses a variety of security mechanisms to ensure transaction security. At the same time, the use of the high-quality franchise company's EEPROM process ensures a long enough memory unit erasing time and data retention time. Using a high-speed 8-bit RISC, it is compatible with Mrochip's PIC16 family on the instruction set, but at 4 times faster.
(1) A page write function for multiple modes such as single-byte, 4-byte, 8-byte, 16-byte, 4K-byte full write. A variety of EEPROM write methods increase the flexibility of programming, while also increasing the processing speed of the chip, reducing the waiting time of the transaction;
(2) 32-bit random number generator. The hardware of the random number generates some certainty that may be introduced to cancel the software-generated random number. The uncertainty caused by the internal clock and the power-on process can be combined with the random number generated by the software to generate a random number in the true sense. So that no hardware or software designer can repeatedly generate the same number;
(3) High and low frequency detection function. Inputs that are too low or too high can cause a chip reset to prevent intruders from performing static analysis and malicious operations;
(4) A read circuit with a brown-out reset and a wide voltage. On the one hand, the FM1004 has a wide power supply range read circuit to prevent EEPROM data reading errors caused by power supply changes; on the other hand, in the case of large fluctuations in power supply, the data in the chip is ensured by timely reset;
(5) Has the function of downloading the program to EEPROM. The EEPROM can be used both as a data storage area and as a program storage area to facilitate system upgrades.
2, characteristics
â— 8-bit high-speed CPU architecture
â— Write time is 2.3ms
â—8K user ROM
â—page writing function
â—224BytesRAM
â—Power-down reset circuit
â—4KBytesEEPROM
â—Working voltage 2.7~5.5V
â— Singapore licensed semiconductor company 0.6um EEPROM process
â—Antistatic capacity exceeds 5000V
â— Process 100,000 erasing
â— Data retention time is more than 10 years. 3. Basic structure diagram
The CPU part uses the improved PIC16C65 family of CPUs, which is not only faster than the standard PIC16C65, but also adds some test instructions and functions to execute programs in the EEPROM. GuardingCircuit is a chip's safety protection circuit that performs functions such as power-on reset, low-voltage reset, and anti-analytical control. The chip interface has multiple ESD protection designs and input noise removal circuitry. The EEPROM interface circuit includes an address decoding, a charge pump, and a page write control circuit. The CPU performs read and write operations on the EEPROM through the EEPROM interface circuit, and the page write function is implemented by assigning different values ​​to the EEPROM page write control word. Built-in self-test modules plus CPU-specific instructions for test design enable extremely fast chip testing and initialization.
4, address bus allocation
Both ROM and RAM have dedicated addresses and data buses connected to the CPU. The ROM address space can be easily extended to 64K. The FM1004's RAM addressing mode has been improved on the basis of the PIC16. Indirect addressing of the first 32 bytes of BANK1 allows access to the RAM space, so 32 bytes of RAM can be used than the PIC16. The EEPROM and the random number generator share a set of address and data buses. The PortB and PortC ports of the PIC16 CPU are used as the address bus, and the PortD port is used as the 8-bit bidirectional data bus. The address space is 64K in total.
The program space of FM1004 is 64K, among which the first 56K program space is planned to be ROM space, and the last 8K program space is EEPROM space (the highest three digits of PC is "111"); since the actual configuration of FM1004 is ROM8K, EEPROM4K, it can be used. The program space is 8K+2K. The program address of the ROM is 0000H~1FFFH, and the program address of the EEPROM is E000H to E7FFH.
The program in FM1004 is segmented in 2K, and the program call across 2K is implemented by register PCLATH. When applying the EEPROM program, after modifying PCLATH to 11100xxx, execute the jump instruction such as CALL or GOTO to execute the program in EEPROM. Another method is to modify the PCL, the content of PCLATH will also be assigned to the upper eight bits of the PC, and the jump function can also be implemented.
5, software development support
Fudan Microelectronics has developed a series of simulation systems, including PIC16 emulators, FPGA emulators and simulation chips to assist COS system vendors to successfully develop and transplant COS on Fudan Microelectronics' chip platform. Complete verification of the correctness of the hardware and software cooperation before the film is produced.
The FM1004 uses a variety of security mechanisms to ensure transaction security. At the same time, the use of the high-quality franchise company's EEPROM process ensures a long enough memory unit erasing time and data retention time. Using a high-speed 8-bit RISC, it is compatible with Mrochip's PIC16 family on the instruction set, but at 4 times faster.
(1) A page write function for multiple modes such as single-byte, 4-byte, 8-byte, 16-byte, 4K-byte full write. A variety of EEPROM write methods increase the flexibility of programming, while also increasing the processing speed of the chip, reducing the waiting time of the transaction;
(2) 32-bit random number generator. The hardware of the random number generates some certainty that may be introduced to cancel the software-generated random number. The uncertainty caused by the internal clock and the power-on process can be combined with the random number generated by the software to generate a random number in the true sense. So that no hardware or software designer can repeatedly generate the same number;
(3) High and low frequency detection function. Inputs that are too low or too high can cause a chip reset to prevent intruders from performing static analysis and malicious operations;
(4) A read circuit with a brown-out reset and a wide voltage. On the one hand, the FM1004 has a wide power supply range read circuit to prevent EEPROM data reading errors caused by power supply changes; on the other hand, in the case of large fluctuations in power supply, the data in the chip is ensured by timely reset;
(5) Has the function of downloading the program to EEPROM. The EEPROM can be used both as a data storage area and as a program storage area to facilitate system upgrades.
2, characteristics
â— 8-bit high-speed CPU architecture
â— Write time is 2.3ms
â—8K user ROM
â—page writing function
â—224BytesRAM
â—Power-down reset circuit
â—4KBytesEEPROM
â—Working voltage 2.7~5.5V
â— Singapore licensed semiconductor company 0.6um EEPROM process
â—Antistatic capacity exceeds 5000V
â— Process 100,000 erasing
â— Data retention time is more than 10 years. 3. Basic structure diagram
The CPU part uses the improved PIC16C65 family of CPUs, which is not only faster than the standard PIC16C65, but also adds some test instructions and functions to execute programs in the EEPROM. GuardingCircuit is a chip's safety protection circuit that performs functions such as power-on reset, low-voltage reset, and anti-analytical control. The chip interface has multiple ESD protection designs and input noise removal circuitry. The EEPROM interface circuit includes an address decoding, a charge pump, and a page write control circuit. The CPU performs read and write operations on the EEPROM through the EEPROM interface circuit, and the page write function is implemented by assigning different values ​​to the EEPROM page write control word. Built-in self-test modules plus CPU-specific instructions for test design enable extremely fast chip testing and initialization.
4, address bus allocation
Both ROM and RAM have dedicated addresses and data buses connected to the CPU. The ROM address space can be easily extended to 64K. The FM1004's RAM addressing mode has been improved on the basis of the PIC16. Indirect addressing of the first 32 bytes of BANK1 allows access to the RAM space, so 32 bytes of RAM can be used than the PIC16. The EEPROM and the random number generator share a set of address and data buses. The PortB and PortC ports of the PIC16 CPU are used as the address bus, and the PortD port is used as the 8-bit bidirectional data bus. The address space is 64K in total.
The program space of FM1004 is 64K, among which the first 56K program space is planned to be ROM space, and the last 8K program space is EEPROM space (the highest three digits of PC is "111"); since the actual configuration of FM1004 is ROM8K, EEPROM4K, it can be used. The program space is 8K+2K. The program address of the ROM is 0000H~1FFFH, and the program address of the EEPROM is E000H to E7FFH.
The program in FM1004 is segmented in 2K, and the program call across 2K is implemented by register PCLATH. When applying the EEPROM program, after modifying PCLATH to 11100xxx, execute the jump instruction such as CALL or GOTO to execute the program in EEPROM. Another method is to modify the PCL, the content of PCLATH will also be assigned to the upper eight bits of the PC, and the jump function can also be implemented.
5, software development support
Fudan Microelectronics has developed a series of simulation systems, including PIC16 emulators, FPGA emulators and simulation chips to assist COS system vendors to successfully develop and transplant COS on Fudan Microelectronics' chip platform. Complete verification of the correctness of the hardware and software cooperation before the film is produced.
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