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O Introduction

Fixed frequency peak current mode PWM (Pulse Width Modulation) Compared with the traditional voltage mode control, the DC-DC converter has the advantages of good transient response, high output precision and strong load capacity, so it is widely used. As an important analog unit, the slope compensation circuit and current sampling circuit are the basis of current mode PWM control and play an important role in the stability of the current loop in current mode control.

1 circuit structure

Figure 1 shows the block diagram of a typical peak current mode PWM Boost DC-DC control system. When the voltage feedback signal of the voltage outer loop is sent to the PWM comparator through the error amplifier VE amplified by the error amplifier, a triangular wave or a trapezoidal sharp-angled composite wave whose peak value represents the peak value of the output inductor current and a peak of the current inner loop The signal VE is compared to obtain a PWM pulse turn-off threshold. which is:



In equation (1): the first term is the slope compensation part to ensure the stability of the current loop; the second term reflects the magnitude of the inductor current, usually generated by the current sampling circuit; the third term is used to generate a fixed Base level, as the PWM comparator input Figure 1 Typical peak current mode PWMBoostDC-DC control system block diagram provides a suitable DC operating point.

Therefore, the peak current mode control does not directly control the PWM pulse width with the voltage error signal, but indirectly controls the PWM pulse width by controlling the magnitude of the inductor current at the peak output.



However, the structure of the current mode determines the open-loop instability, subharmonic oscillation, non-ideal loop response, and the vulnerability to noise caused by the current inner loop at duty cycle greater than 50%. Inherent shortcomings. In view of the above problems, in addition to the RC series compensation of the voltage loop, the current loop must be compensated to meet the stability requirements of the current loop. An effective solution is to use the slope compensation technique and reduce the sampling loss while improving the current sampling accuracy to ensure the stability of the current loop.

In this paper, the V/I conversion of the voltage on the oscillator charge and discharge capacitor is used to obtain a stable slope with easy slope adjustment. At the same time, the power SENSEFET is used as the sampling device, and the sampling factor is not combined with the simple V/I conversion. The effects of temperature and process, while achieving higher precision sample values, also reduce losses.

2 circuit principle analysis

2.1 Slope compensation

Figure 2 shows the method of superimposing the slope compensation voltage on the error signal VE. VE is the error amplification signal of the voltage feedback loop, the solid line waveform is the undisturbed inductor current, the dashed line is the inductor current superimposed by the ΔI0 disturbance amount, D is the duty ratio, and m1 and m2 are respectively the equivalent inductor currents obtained by sampling. Rise and freewheeling slope.




It can be seen from Fig. 2(a) and (b) that if there is no slope compensation, in the next cycle, the disturbance current is:


After n cycles, the current error ΔIn caused by ΔI0 is:


It can be seen from equation (3) that when m2 When m1, that is, D>50%, the current error ΔIn will gradually increase, resulting in system instability.

Fig. 2(c) shows the inductor current waveform after the compensation voltage is superimposed at D>50%. For this waveform, there are:


Obviously, in order to stabilize the loop, it is necessary to make â–³I1 < â–³ Io, that is, satisfy:

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